Study guide: Logic Circuits
Overview
Logic gates build Boolean functions in hardware. In a combinational circuit the output depends only on the current inputs, and a handful of such blocks (adders, subtractors, multiplexers) are the foundation of every processor's arithmetic unit.
Key ideas explained
Gates
AND, OR and NOT are the basic gates; NAND, NOR, XOR and XNOR are common combinations. NAND and NOR are universal: any circuit can be built from only one of them.
The half adder and the full adder
A half adder adds two bits: Sum = A ⊕ B and Carry = A·B. A full adder adds A, B and a carry-in: Sum = A ⊕ B ⊕ Cin and Cout = AB + Cin(A ⊕ B). It can be built from two half adders and an OR gate.
Subtractors
A half subtractor computes A − B: Difference = A ⊕ B and Borrow = A′B. A full subtractor adds a borrow-in: Diff = A ⊕ B ⊕ Bin and Bout = A′B + (A ⊕ B)′·Bin.
Multiplexers and ripple-carry adders
A 2ᵏ-to-1 multiplexer uses k select lines to route one of 2ᵏ inputs to the output. Chaining n full adders makes an n-bit ripple-carry adder; the carry must travel through every stage, so delay grows with n, which carry-lookahead logic reduces.
Worked examples
One full adder
Problem. Add A = 1, B = 1 and Cin = 1.
- Sum = 1 ⊕ 1 ⊕ 1 = 1.
- Cout = AB + Cin(A ⊕ B) = 1 + 1·0 = 1.
Answer. Sum 1 and carry 1, which is binary 11 = 3.
A 4-bit ripple-carry addition
Problem. Add 0110 (6) and 0111 (7).
- Bit 0: 0 + 1 + 0 gives sum 1, carry 0.
- Bit 1: 1 + 1 + 0 gives sum 0, carry 1.
- Bit 2: 1 + 1 + 1 gives sum 1, carry 1.
- Bit 3: 0 + 0 + 1 gives sum 1, carry 0.
Answer. 1101, which is 13.
Enter these same values in the calculator above and compare each step with the working shown here.
Common mistakes to avoid
- Confusing sum and carry. The half-adder carry is AND, not OR.
- Forgetting that a full adder has three inputs.
- Writing the borrow as AB′ instead of A′B.
- Ignoring propagation delay when judging how fast a ripple adder is.
- Mixing up the order of select lines when wiring a multiplexer.
Where this shows up in computer science
- Processor arithmetic units are built from adders, and subtraction is done by adding the two's complement.
- Decoders select memory rows, and multiplexers route data buses.
- FPGA lookup tables are small multiplexer trees that realise any truth table of a few inputs.
Test yourself
Try each question before opening the answer.
What are the half-adder outputs for A = 1 and B = 1?
Sum 0 and carry 1.
How many full adders does an 8-bit ripple-carry adder need?
8.
How many select lines does an 8-to-1 multiplexer need?
3.